Dec 282015

Hello from ASM80. Recently (a ten minutes ago, to be honest) I have added a support for WDC’s 65C816, the 6502 sequel with hybrid data width (8/16 bits). It is used in some notable computers, such as Apple ][gs, Nintendo’s SNES or SuperCPU extension for C64.

Due to its dual data width, I have to added some new directives to specify index / accumulator width. You have to specify it directly with:

Directive Meaning
.m8 Accumulator is 8bit
.m16 16bit accumulator
.x8 index register is 8bit
.x16 16bit index

65C816 added new addresing modes. The main innovation are “long” modes with 24bit addresses, e.g. JMP $123456. Such instructions are compiled in 4 bytes, e.g.  “5C 56 34 12”.

I believe (the word “believe” is important) it should work without any problems, but I warmly appreciate any feedback.

The 65C816 assembler is early beta, so I decided to release it as a single page assembler as this moment instead of full support in IDE. You can try it here: ASM65816 single page assembler. Please do not hesitate to send any feedback or bugreports to my mail Thanks.

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